Presently known PFCs have the following drawbacks:
They use a double feedback loop, i.e. one to sense the line current and the other to sense the output voltage. This arrangement requires heavy calculating power in the chips that generate the driving pulse width to the power FETs;
These chips have important limitations that end up in incoherent system equations for calculations of the chokes and power FETs characteristics, thus requiring a lot of empirical testing from the designer or trouble shooter. Besides, it still remains unclear whether these chips are usable above 500 watts. All these factors lead to very substantial development and maintenance costs.
This is probably the major reason why the U.S. Government has been reluctant to adopt the IEC 555-2 norm for the last decade.
An objective of the invention is to eliminate the above deficiencies and provide a simple system allowing use of a single basic equation and to increase predictability of the circuitry.
Another objective of the invention is to provide a system which is applicable to any power output (watts to kilowatts).